1. Field of the Invention
The subject invention generally pertains to electronic power conversion circuits, and, more specifically, to high frequency, switched mode electronic power converters. The subject matter relates to new boost power converter circuit topologies having bipolar outputs used for ac to dc power conversion and to power converter topologies having bipolar inputs.
2. Description of Related Art
Bridgeless power factor correction (PFC) boost converters have been known for some time. With the recent establishment of high efficiency legal mandates for power supplies they have become more popular. An example of a prior art bridgeless PFC boost converter is illustrated in FIG. 1. The FIG. 1 circuit does not employ a bridge rectifier, but rather uses the boost converter's switches and rectifiers to accomplish the rectification. The FIG. 1 circuit employs two boost converters that are activated on alternate half cycles of the line voltage source, one converter is activated for the positive half cycle and the other boost converter is activated for the negative half cycle. In FIG. 1 during the positive half cycle of VSOURCE (terminal L positive with respect to terminal N) a boost converter comprising switch SW2, diode D2, LIN, and CFILT is active. During the positive half cycle switch SW1 remains in an on condition for the entire half cycle and diode D1 remains in an off condition for the entire half cycle. During the negative half cycle of VSOURCE (terminal L negative with respect to terminal N) a boost converter comprising switch SW1, diode D1, LIN, and CFILT is active. During the negative half cycle, switch SW2 remains in an on condition and diode D2 remains in an off condition. The FIG. 1 circuit accomplishes higher efficiencies by comparison to more conventional boost PFC circuits, but there are some problems associated with the FIG. 1 circuit. To accomplish PFC a PFC controller needs to regulate line current, which requires an ability to sense line current. In FIG. 1 both terminals of the series network containing the line voltage source and boost inductor are modulated at high frequency. It would be much easier to sense line current if one of the terminals of the input network were connected to an ac ground. Perhaps a bigger problem is the problem of common mode (CM) noise inherent to the FIG. 1 circuit. FIG. 2(a) illustrates the line voltage wave form which indicates the two regions of operation, i.e., positive half cycle (Region 1) and negative half cycle (Region 2). FIG. 2(a) illustrates the voltage wave form of the OUT-terminal during the positive half cycle with respect to terminal N of the line voltage source VSOURCE. In a typical application terminal N will be connected to earth ground at the electrical service entrance to a building or installation. During the positive half cycle the OUT-terminal is connected through SW1 to terminal N of VSOURCE. During the negative half cycle the OUT-terminal is alternately connected and disconnected from terminal N of VSOURCE, which results in the voltage wave form of FIG. 2(c) for the OUT-terminal during the negative half cycle (Region 2). A similar ac wave form (not shown) appears at the OUT+ terminal during the negative half cycle. Parasitic capacitances in the circuit, illustrated in FIG. 3 transfer some of the ac signal at the output terminals back to the line voltage source. The ac signals are CM signals and can potentially result in an electromagnetic compliance (EMC) failure. FIG. 4 illustrates a post converter circuit that might be used with the FIG. 1 circuit in a typical application. For many consumer products sold throughout the world the PFC boost rectifier must accommodate ac line voltages ranging from 85 to 265 volts and the boost rectifier would typically have an output dc voltage of about 380 to 400 volts. A typical universal input circuit might use 500 volt rated mosfet switches. The load coupling network illustrated in FIG. 4 might typically contain an LC filter and a load and may or may not also contain a transformer for galvanic isolation plus a rectifier circuit. What is needed is a bridgeless boost circuit that does not have the current sensing problems and CM noise problems of the prior art with similar efficiency advantages.
FIG. 16 illustrates a very simple bridgeless PFC boost converter that can achieve both simple current sensing using a sense resistor placed between the N terminal of VSOURCE and the ground terminal and low common mode noise. Low common mode noise results because both output filter capacitors have a connection to an ac ground and line neutral. Because of the connection of the output filter capacitors to line neutral there can be no high frequency voltage wave forms at the output filter capacitor terminals. FIG. 17 illustrates how the circuit can be implemented using mosfets for the switches. FIG. 18 illustrates a zero voltage switching implementation of the FIG. 16 circuit using a prior art zero voltage switching cell. The FIG. 16 circuit has one significant drawback. The boost converter of FIG. 16 both charges and discharges the output filter capacitors during normal operation. Most boost converters only charge the output filter capacitor. The output filter capacitor of most boost converters is discharged only by the load. The fact that the output filter capacitors are discharged by the FIG. 16 circuit significantly increases the current, power, and thermal stresses of the output filter capacitors. In the FIG. 16 circuit the CFILT− capacitor is discharged when the CFILT+ capacitor is charged in region 1 and the CFILT+ capacitor is discharged when the CFILT− capacitor is charged in region 2. The net effect is the charging of both capacitors, but additional losses are incurred because of the discharge currents. The additional losses incurred because of discharging is greatest at the minimum ac line voltage which is the worst case condition for the boost converter. What is needed is a bridgeless boost converter having simple current sensing, low CM noise, and no output filter capacitor discharging into the boost converter.
For a unipolar output boost converter a common downstream post converter is illustrated in FIG. 4. For the FIG. 16 circuit the FIG. 4 circuit could be used as a downstream (load side) post converter, but the input voltage to the FIG. 4 circuit, when used with a FIG. 16 boost pre-regulator, is twice the voltage that would typically appear at the output of a typical unipolar output boost pre-regulator. To use the FIG. 4 circuit with a bipolar output boost pre-regulator requires switches with twice the voltage rating of a unipolar boost pre-regulator. For a universal input boost pre-regulator 1000 volt switches would be required. 1000 volt switches are readily commercially available, but 1000 volts represents the high end of what is available in power mosfets and the available choices are reduced considerably in comparison to the choices at 800 volts and below. An equivalent 1000 volt mosfet can be formed by stacking two 500 volt mosfets, but with 500 volt mosfets 8 transistors are required to implement the FIG. 4 circuit. What is needed are solutions for downstream (load side) post converters for bipolar output boost converters that rely on four or fewer 500 volt mosfets with capability and performance equivalent to the FIG. 4 post converter.